| Safe Haskell | None |
|---|---|
| Language | Haskell2010 |
Nes.CPU.Instructions.Bitwise
Synopsis
- bit :: AddressingMode -> CPU r ()
- and :: AddressingMode -> CPU r ()
- ora :: AddressingMode -> CPU r ()
- eor :: AddressingMode -> CPU r ()
- rol :: AddressingMode -> CPU r ()
- ror :: AddressingMode -> CPU r ()
- rla :: AddressingMode -> CPU r ()
- asl :: AddressingMode -> CPU r ()
- lsr :: AddressingMode -> CPU r ()
- anc :: AddressingMode -> CPU r ()
- sre :: AddressingMode -> CPU r ()
- slo :: AddressingMode -> CPU r ()
- alr :: AddressingMode -> CPU r ()
- arr :: AddressingMode -> CPU r ()
- xaa :: AddressingMode -> CPU r ()
- rol_ :: AddressingMode -> CPU r Byte
- ror_ :: AddressingMode -> CPU r Byte
Test bit
bit :: AddressingMode -> CPU r () Source #
test if one or more bits are set in a target memory location
https://www.nesdev.org/obelisk-6502-guide/reference.html#BIT
Bit logic
and :: AddressingMode -> CPU r () Source #
Register A = Register A & _value in memory_
https://www.nesdev.org/obelisk-6502-guide/reference.html#AND
ora :: AddressingMode -> CPU r () Source #
Register A = Register A | _value in memory_
https://www.nesdev.org/obelisk-6502-guide/reference.html#ORA
eor :: AddressingMode -> CPU r () Source #
Register A = Register A ^ _value in memory_
https://www.nesdev.org/obelisk-6502-guide/reference.html#EOR
Rotate
rol :: AddressingMode -> CPU r () Source #
ror :: AddressingMode -> CPU r () Source #
rla :: AddressingMode -> CPU r () Source #
asl :: AddressingMode -> CPU r () Source #
Arithmetic Shift Left
https://www.nesdev.org/obelisk-6502-guide/reference.html#ASL
lsr :: AddressingMode -> CPU r () Source #
Logical Shift Right
https://www.nesdev.org/obelisk-6502-guide/reference.html#LSR
Unofficial
anc :: AddressingMode -> CPU r () Source #
sre :: AddressingMode -> CPU r () Source #
(Unofficial) Equivalent to LSR and XOR
slo :: AddressingMode -> CPU r () Source #
(Unofficial) Equivalent to ASL value then ORA value, except supporting more addressing modes
alr :: AddressingMode -> CPU r () Source #
(Unofficial) AND + LSR
arr :: AddressingMode -> CPU r () Source #
(Unofficial) part of this command are some ADC mechanisms. following effects appear after AND but before ROR
xaa :: AddressingMode -> CPU r () Source #